Design of Efficient Floating-Point Convolution Module for Embedded System

The convolutional neural network (CNN) has made great success in many fields, and is gradually being applied edge-computing systems. Taking the limited budget of resources systems into consideration, implementation CNNs on embedded devices preferred. However, accompanying increasingly complex huge cost memory, which constrains its devices. In this paper, we propose an efficient, pipelined convolution module based a Brain Floating-Point (BF16) to solve problem, composed quantization unit, serial-to-matrix conversion operation unit. mean error BF16 only 0.1538%, hardly affects CNN inference. Additionally, when synthesized at 400 MHz, area 21.23% 18.54% smaller than that INT16 FP16 modules, respectively. Furthermore, our using TSMC 90 nm library can run 1 GHz by optimizing critical path. Finally, was implemented Xilinx PYNQ-Z2 board evaluate performance. experimental results show frequency 100 is, separately, 783.94 times 579.35 faster Cortex-M4 with FPU Hummingbird E203, while maintaining extremely low rate.